University of Maryland Electrical Engineering Department Technical Report
Technical Report EE-TR-93-027
This paper presents a CAD tool, SystSim, to ease the design of systolic systems. Given a high-level, functional description of processors, and a high-level description of their interconnection, SystSim will perform simulations and provide graphical output. SystSim will also perform transformations such as retiming, which eases use of the methodology of Leiserson and Saxe of designing a system with broadcasting and then obtaining a systolic system through retiming.
Ronald~I. Greenberg and H.-C. Oh. A systolic simulation and transformation system. Technical Report EE-TR-93-027, University of Maryland Electrical Engineering Department, March 1993.
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